Thread: Ram 101
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Old 04-02-2005, 08:17 PM   #2 (permalink)
Praetor
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Default Definitions Part 01

Section 1 -- Definitions
RAM. Random-access-memory (the single term 'memory' also refers to RAM); RAM is available to a system in order for the operating system and various applications to store data temporarily. There are various different incarnations of 'RAM' which can be somewhat grouped together either by speed or by the inclusion (or omission) of certain functions and capabilities. Data stored in RAM/memory is only available until the system is powered down (at which point all the memory is flushed).

Yes there are types of memory that do not lose their data upon losing power and these are generally classed under NVRAM (NV for non-volatile); for the remainder of this document the terms "RAM", "system memory" and "main memory" will not refer to this type of memory; that is, whenever NVRAM needs to be discussed it will be explicitly noted as such.

Memory Clock Speed. Memory is a clock-driven "thing" (be it a device or interface) and all operations are initiated with respect to a "clock" (a device present on the motherboard called a clock-generator provides the clock). Since all operates occur with respect to the clock, increasing the clock speed of the memory will undoubtably increase it's performance (albeit at a cost of stability/reliability).

SRAM, DRAM and SDRAM. Static-RAM (SRAM) is RAM "the way it was meant to be": very fast and doesnt require 'reminding'. In techie terms this means that SRAM, being a transister based design, does not require constant refreshing (which wastes time) and furthermore, this feature of not-having-to-be-constantly-updated makes it, by nature more stable. The downside of SRAM is that it is extremely expensive and not very space-efficient. Dynamic-RAM (DRAM) was introduced as a technology to deal with this: the use of capacitors provides for a very space- and cost-effective method of creating 'memory' however at a cost of constant refreshing (without which the data would be destroyed). DRAM is mostly implemented as system memory where "general purpose speed" is required (even though this speed is several orders of manitude faster than the interface it was designed to supplement, the harddrive) and SRAM is used in small amounts to operate as a very high speed temporary storage interface for various devices.. Noting that DRAM is very slow, SDRAM was introduced: SDRAM or synchronous-DRAM improves and differs from DRAM by providing two things:
  1. It operates on it's own clock and as such we can pair a relatively slow system clock (say, on a budget machine) with a slightly faster memory clock in order to provide performance jumps at minimal cost, The other advanatage is that we can now run the memory clock and the 'main' clock at different speeds in order to facilitage certain requirements/demands
  2. Burst operations (see definition) are now supported which help to mitigate the effects of delays introduced by latencies and timings

Burst. It is logical to assume that if the CPU requires data from location X in memory, it is highly likely that data from location X+1, X+2 and so on is also desireable and so to save time (by reducing the number of commands tossed around), the memory, when asked for data, will provide the contents of the next four or eight locations automatically. This ingeniuos design decision is known as "burst mode"

Timings, Latency. From the basic design nature of memory, it (the memory) cannot be accessed "right away" (think of a library: you may know exactly what the call-number for a book may be however you cant just walk in pooof have the book, gotta find or at least, get to the book). Everytime a [major] operative command is sent to memory there is a delay required before it can be completely processed and collectively these delays are known as timings or latencies and they are measured in clock cycles. While there are about a dozen or two timings related to memory, only a few are significant enough to mention (and they are dealt with in VFAQ Section). In general, the lower the timings, the better performance.

Continue to Part 02 ...
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Last edited by Praetor; 04-02-2005 at 08:28 PM.
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