Most of it is the shrinking of transistors. New stuff coming out is using the TSMC N3 process, with a "3nm" branding. Older CPUs even like the Core 2 Duo were based on a 45nm process for 'Wolfdale' like the E8400. An additional benefit is that there's less power required to energize the same amount of transistors when you're at a smaller scale, of which you can also 'pack more' into the same physical space on the CPU.
There's also advancements as to 'how' to manage data effectively, such as the Ryzen Infinity Fabric being a superior mindset compared to other implementations like the Sandy Bridge QPI 'ring bus' type of topology.
How you encode data is also a beacon for a lot of gains, such as 802.11n vs 802.11ax for wifi as another example. A more CPU specific example would be adding AES instruction sets to your CPU, so you have precomputed algorithms that can be conducted similar to a hardware level that net you large gains for a given implementation.
'Scaling out' as opposed to relying on a single core for performance has also been the developing story since dual core CPUs became common on the market. If you have a parallel workload then you can simply can have an improvement by adding 'moar cores'. IPC advancements are also 'a thing' as for doing more 'work' with the same amount of clock cycles, by analyzing existing designs and providing improvements on how to manipulate whatever amount of data you're trying to process.