I need help regarding how Processors connect to memory and I/O devices using buses

PJBC

New Member
Part of the distinction criteria of my assignment is this

"D1 explain how the processor is physically connected to memory and input/output (I/O) devices using the system buses"


Can anybody help me on this because I'm sorta stuck? So far, all I have is a paragraph on CPU Cache, this whole criteria confuses me beyond all belief.
 
On older systems the processor connected to everything through the Northbridge chip. Even if its is a feature of the Southbridge, it still went through the Northbridge. On newer systems like AMD, alot of processes bypass the Northbridge using the Hypertransport bus. Intel uses QPI/QuickPath and DMI/Direct Media Interconnect.
 
On older systems the processor connected to everything through the Northbridge chip. Even if its is a feature of the Southbridge, it still went through the Northbridge. On newer systems like AMD, alot of processes bypass the Northbridge using the Hypertransport bus. Intel uses QPI/QuickPath and DMI/Direct Media Interconnect.

Thanks, should be able to write up a load of paragraphs on that, much appreciated.



@Perkomate thanks also.
 
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