Why do call, interrupt, and trap gates have two offset fields?

[jj1984]

Why do call gates, interrupt gates, and trap gates have two offset fields?

My theory is that you have the option of jumping to two different procedures within the same segment.

What do you guys think?

 

[Cromewell]

They are split between the low and high. I imagine this is a legacy carry forward because initially the processors were 16 bit.

Are we helping you pass your computer architecture course or something?

 

[jj1984]

They are split between the low and high. I imagine this is a legacy carry forward because initially the processors were 16 bit.

Can you explain further, please?

Do you mean that the two offsets map to the high end and low end of the segment?

Are we helping you pass your computer architecture course or something?

lol...no...

I'm just making my way through the bible, and I have a ton of questions.

 

[jj1984]

Also, how does the computer know which offset to use?

There's only one segment selector which makes sense, but with more than one offset I don't see how the system knows which address to jump to.

 

[Cromewell]

There's a lot of old stuff that's a carry forward from the first days of the architecture.

Also, how does the computer know which offset to use?

It uses both. OffsetLow is the first 16 bits, OffsetHigh is the second 16 bits. It's just split into 2 parts. It's not like it picks one or the other. In an AMD64 interrupt it's 3 fields, 2 16 bits and a 32 bit.

If you take the definition, it makes sense:


If I take the OffseLow field and make it 32 bits long I mess up the alignment of the rest of the bits. So to update my instruction to work in a 32 bit environment I need to add 16 new bits somewhere else.

 

[jj1984]

Crystal clear now.

Thanks.