AMD Barcelona Quad-Core specs

[-0MEGA-];463819 said:
It's not a 128 Bit CPU, it just has an SSE width of 128 Bits... I think.:rolleyes:
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That's the SSE execution width along with the Data cache and L2 memory/cache controller bandwidth there.
 
This will be interesting... it doesnt ave a free for all chache like the 4Mb of the C2D.. but each core has its own cache, and some is shared..
Its quite funny that AMD and intell make completely different chaip... Im looking forward to it :)
 
Archangel said:
This will be interesting... it doesnt ave a free for all chache like the 4Mb of the C2D.. but each core has its own cache, and some is shared..
Its quite funny that AMD and intell make completely different chaip... Im looking forward to it :)
Click to expand...

Why do you think AMD rang circles around Intel for all those years. While Intel was focused on ghz figures to sell their stuff AMD was focused more on performance without the big clock speed. Gee I'll be waiting for the chance to go to Barcelona in AMD land some time. :D
 
Barcelona uses a three-stage cache architecture. The L1 cache is 64KB, the L2 cache is 512KB and the L3 cache is 2MB. The L1 and L2 caches are dedicated to a particular core, while the L3 cache is shared among all cores. Note that the L3 cache has been engineered to be variable in size, so that different products may offer different L3 cache sizes. The L1 and L2 caches are exclusive, as with current Opterons and Athlon 64s. This means that the L1 and L2 cache don't hold copies of the same data.
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now thats interesting
 
I told you those Opterons were good. :D Now I'm starting to get that itch for a new build again. The wonder now is on when the prices will drop far enough before something else is decided on. :confused: For the time being this one is going to have to do the work. Anticipation for benchmarks.... impending!
 
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