im sitting in my cis class and we are doing a a+cert hardware test and my question is this, it makes no sense to me
The AMD Atholon and Durons CPU's interface with the motherboard at the motherboard clock rate of ___ MHz, but use a double clocking technique that results in an actual data transfer of ___ MHz.
A 50, 100
B 100, 200
C 66.5, 133
D 133, 66.5
E 100, 50
F 200, 100
Thanks guys
The AMD Atholon and Durons CPU's interface with the motherboard at the motherboard clock rate of ___ MHz, but use a double clocking technique that results in an actual data transfer of ___ MHz.
A 50, 100
B 100, 200
C 66.5, 133
D 133, 66.5
E 100, 50
F 200, 100
Thanks guys